Message Passing On Communication-Exposed Multi-Core Processors

Next-generationmicroprocessorswill increasingly rely onparallelism, as opposed to frequency scaling, for improvements in performance scalability. Microprocessor designers are attaining such parallelism by placing multiple processing cores on a single silicon die. Current commercial multi-core processors such as the POWER and AMD Opteron  force inter-processor communication to go through the memory system. However, some multi-core processors such as the MIT Raw processor o er rst-class network support that exposes network resources at the ISA level, providing opportunities to interact with hardware resources in novel ways. ˆis paper presents rMPI, which leverages the on-chip network of multi-core processors to build an abstraction with whichmany programmers are familiar: the MPI programming interface. ˆis study uses the MIT Raw processor as an experimentation and validation vehicle, although the ndings presented are applicable tomulti-core processors with on-chip networks in general. Likewise, this study uses theMPIAPI as a general interface which allows parallel tasks to communicate, but the results shown in this paper are generally applicable to message passing communication. Overall, rMPI’s design constitutes themarriage ofmessage passing communication andonchip networks, allowing programmers to employ a well-understood programming model to a novel high performance multi-core processor architecture. rMPI o ers the following features: robust, deadlockfree, and scalable programming mechanisms; an interface that is compatible with current MPI so ware; an easy interface for programmers already familiarwith high-levelmessage passing paradigms; and ne-grain control over their programs when automatic parallelization tools do not yield su cient performance. ˆis paper compares rMPI running on such a multi-core processor to hand-coded applications running on one of the processor’s lowlevel on-chip networks. rMPI is also compared to a commercialqualityMPI implementation running on a cluster of Ethernet-connected workstations. ˆis paper evaluates various performancemetrics such as latency, bandwidth, and performance scalability on a number of kernel benchmarks and applications. Results show that rMPI provides speedups of x to x for  processor cores, depending on the application, which equal or exceed performance scalability of the MPI cluster system. Furthermore, rMPI achieves overhead as low as  for real applications relative to hand-coded applications.